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ASIC Glossary of Terms

A B C D E F G H I J K L M N O P Q R S T U V W X Y Z All

Back end:
A slang term frequently applied to the assembly and test portion of the semiconductor manufacturing process (see Front end).

Fine grinding or polishing of the bottom side of wafers prior to diffusion to reduce wafer stress and provide uniform thickness and planarity.

A detailed definition of a device's electrical and mechanical configuration, assembly, processing and testing used as a base from which to track subsequent changes.

Binary logic:
Logic using two logic states (ON and OFF, or Logic "0" and Logic "V).

Devices or processes in which current-carrying areas and substrates are of different polarities (such as the PNP and NPN transistors used to form TTL circuits). Both holes and electrons are transported in bipolar devices. Some technologies, such as BI-FETTM, combine bipolar and unipolar elements.

See Built in self test

One binary digit. In binary arithmetic all data is represented by 1's and 0's. In a semiconductor device, these logic levels are created by the presence or absence of electrons in a cell.

Block diagram:
A system diagram in which the principal parts or functions are represented by blocks connected by lines which show the relationships of the blocks.

Bond pull:
Pulling of the bond wires to destruction to determine the strength of the bonds.

Bonding pad:
An expanded metallization area on the surface of a die where the bonding wire will be placed.

Built-in self test:
Subcircuitry designed into a circuit to allow that circuit to test itself either at a predetermined interval or upon external command.

The application of electrical biases to a device while operating it at an elevated temperature (usually 125°C), normally as a 100% screening test. Standard burn-in durations are 160 hours for Class B devices and 240 hours for Class S. This test is designed to "weed out" devices subject to infant mortality or excessive parametric drift.