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ASIC Glossary of Terms



A B C D E F G H I J K L M N O P Q R S T U V W X Y Z All

Wafer fabrication:
The process whereby semiconductor elements are manufactured on the surface of silicon wafers.


Wafer lot acceptance testing:
Testing of an integrated circuit wafer lot to determine its acceptability for the assembly of Class S devices


Wafer lot:
A single lot of wafers processed through all processing steps including metallization together. A wafer run may consist of more than one device type, where the various device types differ only in the metallization pattern employed.


Wafer probe:
Or Wafer sort,a process of electrical testing with a set of microscopic contacts or probes called a Probe card are held in place with the wafer, vacuum-mounted on a Wafer Chuck, is moved into electrical contact. When a die (or array of dice) have been electrically tested the prober moves the wafer to the next die (or array) and the next test can start.


Waffle Packs:
Waffle Pack is a form of packaging designed for use with parts that are either very small or unusual in shape. Waffle pack are embossed or pocketed trays, typically made of plastic, that resemble a breakfast waffle (hence the name).